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Ethos Tech One Pte. Ltd.
singapore
Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Anal
Job Source: Ethos Tech One Pte. Ltd.Ethos Search Associates Pte. Ltd.
Singapore
Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Anal
Job Source: Ethos Search Associates Pte. Ltd.Ethos Search Associates Pte. Ltd.
singapore
Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Anal
Job Source: Ethos Search Associates Pte. Ltd.Ethos Tech One Pte. Ltd.
Singapore
Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Anal
Job Source: Ethos Tech One Pte. Ltd.Ethos Tech One Pte. Ltd.
Singapore
Job Description Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing. Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc. Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies. Work closely with other groups like Anal
Job Source: Ethos Tech One Pte. Ltd.Ethos Search Associates Pte. Ltd.
Singapore
Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Re
Job Source: Ethos Search Associates Pte. Ltd.Ethos Tech One Pte. Ltd.
Singapore
Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Re
Job Source: Ethos Tech One Pte. Ltd.Ethos Search Associates Pte. Ltd.
singapore
Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with remote designers Re
Job Source: Ethos Search Associates Pte. Ltd.Singapore
$ 57600-108000
Job Description
Work on RTL to GDS, including synthesis, placement, clock tree insertion and routing.
Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.
Job Requirements
Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with min 1 year experience
Good experience and knowledge in design flow from Netlist to GDS, Floor Planning, Synthesis, route , STA, CTS, RC Extraction and correlation
Static timing analysis, power and noise analysis and back-end verification across multiple projects.
Proficient with backend design EDA tools, Synopsys ICC2 preferred
Successfully track records of taping out complex SOC
Working knowledge of deep sub-micron routing issues as they relate to power and timing.
Proficiency using Perl and TCL
Self-motivated team worker, good verbal and written communication skills
Ethos Search Associates Pte. Ltd.
EA Licence No: 13C6655
EA Reg No: R1109557 Rose
Sr Design Engineer (Physical Design) jobs in Singapore
ⓘ There was an unexpected error processing your request.
Please refresh the page and try again.
If the problem persists, please contact us with your issue.
You can always manage your preferences and update your interests to ensure you receive the most relevant opportunities.
Get ready to discover your next great opportunity.