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Silith

Singapore / Global

Layout Engineer

Job Description

As a Layout Engineer in our fabless silicon photonics design house, you will transform circuit schematics into physical layouts ready for foundry tape-out. Your expertise in photonic-aware layout and verification ensures that our PICs achieve high performance and manufacturability. You are the final checkpoint before our designs go to silicon.

Responsibilities:

Perform layout design from lower-level modules to top-level placement, routing, and verification

Communicate closely with design engineers to understand layout requirements, assist in floor planning, and complete layout for circuit modules and full-chip integration

Develop layout design guidelines and checklists for inspection, verification, and documentation archiving

Handle project tape-out activities

Other ad-hoc tasks as assigned by supervisors

Requirements:

Bachelor's Degree in Microelectronics, Electronic Engineering, or related fields

Minimum 1 year of experience in semiconductor industry

Proficient in reading and understanding foundry process flow and design rule documents; fully understand device structures of the process technology; ability to establish standard cell libraries

Experience with Python for layout design automation

Experience in writing Calibre DRC runset scripts

Experience or knowledge of tape-out process is preferred

Tools you will master and utilize daily:

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