Package Silicon Technology Node Development Director/DMTS

Our vision is to transform how the world uses information to enrich life for all. We are an inclusive team passionate about leveraging expertise in the relentless pursuit of innovation for customers and partners. The solutions we build enable virtual reality experiences and breakthroughs in neural networks, while committing to integrity, sustainability, and community impact.

The PDE Director/DMTS role focuses on technical leadership in developing and maintaining chip package interaction technology roadmaps and strategies for advanced silicon technology node transitions in packaging.

Responsibilities

Leading global technical silicon teams

Developing and communicating silicon technology roadmaps and working closely with multiple fab sites on advanced memory technology transitions

Collaborating with engineering teams in fab process integration, assembly design and development, and product design and development to establish CPI risk mitigation strategies

Regularly aligning priorities, timelines, and resource needs with management and stakeholders to keep silicon technology and test vehicles working seamlessly with design & process requirements

Requirements and Background

Good understanding and experience with process technology development business processes and strategy

Understanding of memory technologies and processing, as well as semiconductor processing and devices

Expertise in chip-package-interaction failure mechanisms and risk assessments

Demonstrated ability to form collaborations (internal and external) and with internal customers

Ability to work on multiple projects and address cross-disciplinary and cross-organizational issues

Strong presentation skills and experience

Strong relationship building and matrix management skills

Proven ability to solicit feedback, accept input, and analyze success/failure of self and team

How to Qualify

Master’s or Ph.D. degree or higher in Materials Science/Engineering, Chemical Engineering, Electrical Engineering, Physics, Chemistry, or a similar field is preferred

15+ years of proven experience in related fields

Experience with chip package interactions, semiconductor electrical/physical failure mechanisms, failure analysis, testing/screening methods, and reliability testing

Documented record of technical expertise and innovation resulting in high-impact results; publications, patents, and a track record of technical leadership and mentoring

Excellent communication skills with the ability to convey sophisticated technical concepts to both technical and non-technical partners

Equal Opportunity Employer

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

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