Senior Integration Engineer, Yield & Defect Reduction

Job Description

Vanguard International Semiconductor Corporation in Singapore seeks an experienced engineer to drive defect reduction and yield improvement across front-end wafer manufacturing. You will supervise YE Associate Engineers and train staff on defect sources, recipes, and inline failure analysis, ensuring quality and adherence to SOPs.

The role requires 2–6 years in high-volume electronics fab, strong collaboration, and a proactive approach to EHSS policies.

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Vanguard International Semiconductor Corporation

Senior Integration Engineer, Yield & Defect Reduction

Job Description

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