Senior C++ Engineer

HFT Senior C++ Engineer: Low-Latency Trading Platform Team - Singapore

The Firm:

My client is a large, global multi-strategy investment firm running systematic and high-frequency trading strategies across equities and other asset classes. The team sits within the firm's Equities, Quant Strategies, and Shared Services Technology organization, responsible for the firm's lowest-latency trading and market data platforms - spanning latency-critical trading, direct market access order management, market data feeds, packet capture, and intraday data services, across latency tiers from sub-100 nanoseconds to millisecond-sensitive workflows.

The Role:

As a Senior HFT Developer, you will design and build core low-latency components for order entry, market data, exchange simulation, feature extraction, and strategy containers. You will work closely with system architects and quantitative researchers, operate and optimize these systems in production, and provide technical leadership for the low-latency platform within the APAC region, with a path to formal team leadership as the effort scales.

What You'll Do:

Build low-latency infrastructure for order entry, market data, exchange simulators, feature extraction, strategy containers, and related systems

Build convenience-layer tools and services to support trading teams onboarding onto the platform

Participate in an L2 support rotation for latency-critical systems, including real-time troubleshooting of production issues

Work closely with the platform architect, quantitative researchers, and the business to deliver high-ROI solutions aligned to platform strategy

Provide technical leadership for the low-latency trading platform in APAC, owning architectural decisions, setting performance and quality standards, and mentoring less experienced engineers

Liaise with other technology teams depending on project focus

What We're Looking For:

5+ years with a well-regarded HFT group, delivering production-grade, low-latency systems

Demonstrated expertise in C++ and Python for production, low-latency systems

Strong understanding of Linux internals and CPU architecture (caches, NUMA, branch prediction), and performance profiling

Experience with ultra-low-latency networking (multicast market data, TCP/UDP, kernel-bypass such as DPDK/Onload); custom NIC/FPGA stack experience a plus

Strong understanding of the HFT quantitative research pipeline

Experience with HPC grids (scheduling, storage, job management) for research and production workloads

Cloud experience (AWS, GCP) a plus

Proven ability to navigate a large organization, build cross-team relationships, and influence outcomes

High accountability and ownership; able to self-manage priorities and deadlines

Demonstrated technical leadership with cross-team influence and team-management potential

If this sounds like you - or you know someone who could be a good fit for the position - please get in touch!

(The client is an equal opportunity employer).